Nets Containing Floating Input Pins

Parent category: Violations Associated with Nets

Default report mode:


This violation occurs when an input pin for a placed part within the design has been detected to be floating, i.e. not electrically connected to any other part of the circuit.


If compiler errors and warnings are enabled for display on the schematic (enabled on the Schematic - Compiler page of the Preferences dialog), an offending object will display a colored squiggle beneath it. A notification is also displayed in the Messages panel in the following format:

Net <NetName> contains floating input pins (<PinList>),


NetName is the name of the offending net.

PinList is the comma-separated list of pins in that net which are floating.

Recommendation for Resolution

This violation can arise in a number of situations. Consider the following when resolving a violation of this type:

  • If the pin is not to be used within the design, either tie it to the appropriate power line (e.g., GND), or place a No ERC directive on it.
  • Ensure that the wiring to the pin is making electrical contact - i.e. the wire or bus connects to the pin's electrical hot spot.
  • Trace the connectivity of the parent net to which the offending pin is associated. Sometimes, a pin can be caused to 'float' when there is a break somewhere else in the net.
  • Look for additional violation messages in the Messages panel that relate to the same parent net, especially those that mention unconnected objects - this can give an indication where the break in connectivity lies.


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